Randstad Verification Engineer in Hillsboro, Oregon
Friday, October 7, 2016
We have a 6 month contract opportunity for a Verification Engineer in Hillsboro, OR.
We are Iooking for an individual to fill a position for a Iogic - Verification engineer. Candidates must have experience performing ASIC - Verification based on architectural/micro-architectural specification review and analysis followed with definition of - Verification requirements.
Prior experience in hardware emulation or FPGA prototyping will be a plus.
The person in this position will also have the following responsibilities:
Develop tests and test bench components from high Ievel - Verification plans, as well as debug of failing tests, definition of functional coverage space, implementation of coverage monitors and analysis of test coverage space, regression running and debugging failing tests, design and development of test bench collateral.
Team members will also work closely with design and architecture teams to review and refine test and coverage requirements.
Educational requirements for this position are a BSEE/CE minimum, MS preferred.
-5-10 years experience in ASIC Iogic - Verification and strong software skills with experience using 1 or more of the following Ianguages: System - Verilog/Verilog, Perl, C/C++.
-Candidates should also have experience with RTL simulators, - VCS preferred, experience with hardware emulator such as Synopsys Zebu, Cadence Palladium or Mentor Graphics Veloce, experience specifying and developing test bench components, specifying, developing, and debugging functional tests, and experience specifying, implementing and analyzing functional coverage. Strong debug abilities, good interpersonal skills and the ability to work in a highly cooperative team environment across many time zones are also desirable.
-A strong background specifying and developing random test environments is also desired.